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TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 3-17v 3a step-down converter in 3x3 qfn package check for samples: TPS62130, TPS62130a , tps62131 , tps62132 , tps62133 1 features description the tps6213x family is an easy to use synchronous ? dcs-control tm topology step down dc-dc converter optimized for ? input voltage range: 3 to 17v applications with high power density. a high switching ? up to 3a output current frequency of typically 2.5mhz allows the use of small inductors and provides fast transient response as well ? adjustable output voltage from 0.9 to 6v as high output voltage accuracy by utilization of the ? pin-selectable output voltage (nominal, + 5%) dcs-control ? topology. ? programmable soft start and tracking with its wide operating input voltage range of 3v to ? seamless power save mode transition 17v, the devices are ideally suited for systems ? quiescent current of 17 a (typ.) powered from either a li-ion or other batteries as well as from 12v intermediate power rails. it supports up ? selectable operating frequency to 3a continuous output current at output voltages ? power good output between 0.9v and 6v (with 100% duty cycle mode). ? 100% duty cycle mode the output voltage startup ramp is controlled by the ? short circuit protection soft-start pin, which allows operation as either a ? over temperature protection standalone power supply or in tracking configurations. power sequencing is also possible by configuring the ? available in a 3 3 mm, qfn-16 package enable and open-drain power good pins. applications in power save mode, the devices show quiescent current of about 17 a from vin. power save mode, ? standard 12v rail supplies entered automatically and seamlessly if load is small, ? pol supply from single or multiple li-ion maintains high efficiency over the entire load range. battery in shutdown mode, the device is turned off and ? solid-state disk drives shutdown current consumption is less than 2 a. ? embedded systems the device, available in adjustable and fixed output voltage versions, is packaged in a 16-pin qfn ? ldo replacement package measuring 3 3 mm (rgt). ? mobile pc's, tablet, modems, cameras spacing figure 1. typical application and efficiency 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. production data information is current as of publication date. copyright ? 2011 ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. 22uf 1.8v / 3a 10uf 1 / 2.2 h (3 .. 17)v 3.3nf tps62131 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 0.1uf
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. ordering information (1) t a output voltage part number (2) package ordering package marking adjustable TPS62130 TPS62130rgt ptsi adjustable TPS62130a (3) TPS62130argt pa6i -40 c to 85 c 1.8 v tps62131 16-pin qfn tps62131rgt qvx 3.3 v tps62132 tps62132rgt qvy 5.0 v tps62133 tps62133rgt qvz (1) for detailed ordering information please check the package option addendum section at the end of this datasheet. (2) contact the factory to check availability of other fixed output voltage versions. (3) while tps6213x has pg=high z, TPS62130a features pg=low, when device is in shutdown through en, uvlo or thermal shutdown. absolute maximum ratings (1) over operating free-air temperature range (unless otherwise noted) min max unit avin, pvin ? 0.3 20 v en, ss/tr ? 0.3 v in +0.3 pin voltage range (2) sw ? 0.3 v in +0.3 v def, fsw, fb, pg, vos ? 0.3 7 v power good sink current pg 10 ma operating junction temperature range, t j ? 40 125 temperature range c storage temperature range, t stg ? 65 150 hbm human body model 2 kv esd rating (3) cdm charge device model 0.5 kv (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltages are with respect to network ground terminal. (3) esd testing is performed according to the respective jesd22 jedec standard. thermal information tps6213x thermal metric (1) units rgt 16 pins ja junction-to-ambient thermal resistance 29.1 jc(top) junction-to-case(top) thermal resistance 15 jb junction-to-board thermal resistance 11 c/w jt junction-to-top characterization parameter 0.5 jb junction-to-board characterization parameter 10 jc(bottom) junction-to-case(bottom) thermal resistance 3.5 (1) for more information about traditional and new thermal metrics, see the ic package thermal metrics application report, spra953 . spacer recommended operating conditions min typ max unit supply voltage, v in (at avin and pvin) 3 17 v operating free air temperature, t a ? 40 85 c operating junction temperature, t j ? 40 125 c 2 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 electrical characteristics over free-air temperature range (t a =-40 c to +85 c), typical values at v in =12v and t a =25 c (unless otherwise noted) parameter test conditions min typ max unit supply v in input voltage range (1) 3 17 v i q operating quiescent current en=high, i out =0ma, device not switching 17 25 a i sd shutdown current (2) en=low 1.5 4 a v uvlo falling input voltage 2.6 2.7 2.8 v undervoltage lockout threshold hysteresis 200 mv t sd thermal shutdown temperature 160 c thermal shutdown hysteresis 20 control (en, def, fsw, ss/tr, pg) high level input threshold voltage (en, v h 0.9 v def, fsw) v l low level input threshold voltage (en, 0.3 v def, fsw) i lkg input leakage current (en, def, fsw) en=v in or gnd; def, fsw=v out or gnd 0.01 1 a rising (%v out ) 92 95 98 v th_pg power good threshold voltage % falling (%v out ) 87 90 94 v ol_pg power good output low i pg = ? 2ma 0.07 0.3 v i lkg_pg input leakage current (pg) v pg =1.8v 1 400 na i ss/tr ss/tr pin source current 2.3 2.5 2.7 a power switch v in 6v 90 170 high-side mosfet on-resistance m v in =3v 120 r ds(on) v in 6v 40 70 low-side mosfet on-resistance m v in =3v 50 i limf high-side mosfet forward current limit (3) v in =12v, t a = 25 c 3.6 4.2 4.9 a output vref internal reference voltage (4) 0.8 v i lkg_fb input leakage current (fb) TPS62130, v fb =0.8v 1 100 na output voltage range (TPS62130) v in v out 0.9 6.0 v def (output voltage programming) def=0 (gnd) vout def=1 (v out ) vout+5% pwm mode operation, v in v out +1v ? 1.8 1.8 pwm mode operation, v in v out +1v, v out initial output voltage accuracy (5) ? 1.5 1.6 % t a = ? 10 c to 85 c power save mode operation, c out =22 f ? 2.3 2.8 load regulation (6) v in =12v, v out =3.3v, pwm mode operation 0.05 %/a 3v v in 17v, v out =3.3v, i out = 1a, pwm 0.02 %/v line regulation (6) mode operation (1) the device is still functional down to under voltage lockout (see parameter v uvlo ). (2) current into avin+pvin pin. (3) this is the static current limit. it can be temporarily higher in applications due to internal propagation delay (see current limit and short circuit protection section). (4) this is the voltage regulated at the fb pin. (5) this is the accuracy provided by the device itself (line and load regulation effects are not included). for the fixed voltage versions the (internal) resistive divider is included. (6) line and load regulation depend on external component selection and layout (see figure 17 and figure 18 ). copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com device information rgt package (top view) terminal functions pin (1) i/o description name no. sw 1,2,3 o switch node, which is connected to the internal mosfet switches. connect inductor between sw and output capacitor. pg 4 o output power good (high = vout ready, low = vout below nominal regulation) ; open drain (requires pull-up resistor) fb 5 i voltage feedback of adjustable version. connect resistive voltage divider to this pin. it is recommended to connect fb to agnd on fixed output voltage versions for improved thermal performance. agnd 6 analog ground. must be connected directly to the exposed thermal pad and common ground plane. fsw 7 i switching frequency select (low 2.5mhz, high 1.25mhz (2) for typical operation) (3) def 8 i output voltage scaling (low = nominal, high = nominal + 5%) (3) soft-start / tracking pin. an external capacitor connected to this pin sets the internal voltage reference rise ss/tr 9 i time. it can be used for tracking and sequencing. avin 10 i supply voltage for control circuitry. connect to same source as pvin. pvin 11,12 i supply voltage for power stage. connect to same source as avin. en 13 i enable input (high = enabled, low = disabled) (3) vos 14 i output voltage sense pin and connection for the control loop circuitry. pgnd 15,16 power ground. must be connected directly to the exposed thermal pad and common ground plane. exposed must be connected to agnd (pin 6), pgnd (pin 15,16) and common ground plane (4) . must be soldered to thermal pad achieve appropriate power dissipation and mechanical reliability. (1) for more information about connecting pins, see detailed description and application information sections. (2) connect fsw to vout or pg in this case. (3) an internal pull-down resistor keeps logic level low, if pin is floating. (4) see figure 41 . 4 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 3 exposed thermal pad 9 10 11 12 8 7 6 5 4 2 1 16 15 14 13 pvin pvin avin ss/tr sw sw sw pg pgnd pgnd vos en fb agnd fsw def
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 functional block diagram figure 2. TPS62130 (adjustable output voltage) copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 control logic soft start thermal shtdwn uvlo pg control power control error amplifier gate drive hs lim ls lim pvin pvin avin pg pgnd pgnd agnd comp comp + _ timer t on dcs - control tm direct control & compensation comparator ramp sw sw sw en * ss/tr def * fsw * vos fb * this pin is connected to a pull down resistor internally (see detailed description section).
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com figure 3. tps62131/2/3 (fixed output voltage) 6 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 control logic soft start thermal shtdwn uvlo pg control power control error amplifier gate drive hs lim ls lim pvin pvin avin pg pgnd pgnd agnd comp comp + _ timer t on dcs - control tm direct control & compensation comparator ramp sw sw sw en * ss/tr def * fsw * vos fb * * this pin is connected to a pull down resistor internally (see detailed description section).
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 parameter measurement information list of components reference description manufacturer ic 17v, 3a step-down converter, qfn TPS62130rgt, texas instruments l1 2.2 h, 0.165 x 0.165 in xfl4020-222meb, coilcraft cin 10 f, 25v, ceramic standard cout 22 f, 6.3v, ceramic standard cs 3300pf, 25v, ceramic r1 depending on vout r2 depending on vout r3 100k , chip, 0603, 1/16w, 1% standard figure 4. measurement setup typical characteristics table of graphs description figure efficiency vs output current, vs input voltage 5 ? 16 vs output current (load regulation), vs input voltage (line output voltage 17, 18 regulation) vs input voltage 19 switching frequency vs output current 20 quiescent current vs input voltage 21 shutdown current vs input voltage 22 power fet rds(on) vs input voltage (high-side, low-side) 23, 24 output voltage ripple vs output current 25 maximum output current vs input voltage 26 power supply rejection ratio vs frequency 27, 28 (pssr) pwm-psm-pwm mode transition 29 load transient response 30 ? 32 waveforms startup 33, 34 typical pwm mode operation 35 typical power save mode operation 36 vs load current 37 maximum ambient temperature vs power dissipation 38 copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 cout vout cin l1 vin fb pg TPS62130 r1 r2 css r3 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com efficiency efficiency vs vs output current input voltage figure 5. efficiency with 1.25mhz, vout=5v figure 6. efficiency with 1.25mhz, vout=5v efficiency efficiency vs vs output current input voltage figure 7. efficiency with 2.5mhz, vout=5v figure 8. efficiency with 2.5mhz, vout=5v efficiency efficiency vs vs output current input voltage figure 9. efficiency with 1.25mhz, vout=3.3v figure 10. efficiency with 1.25mhz, vout=3.3v 8 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0.0001 0.001 0.01 0.1 1 10 vin=12v vin=17v output current (a) efficiency (%) vout=5.0vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 7 8 9 10 11 12 13 14 15 16 17 iout=1ma iout=10ma iout=100ma iout=1a input voltage (v) efficiency (%) vout=5.0vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0.0001 0.001 0.01 0.1 1 10 vin=5v vin=12v vin=17v output current (a) efficiency (%) vout=3.3vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 4 5 6 7 8 9 10 11 12 13 14 15 16 17 iout=1ma iout=10ma iout=100ma iout=1a input voltage (v) efficiency (%) vout=3.3vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0.0001 0.001 0.01 0.1 1 10 vin=12v vin=17v output current (a) efficiency (%) vout=5.0vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 7 8 9 10 11 12 13 14 15 16 17 iout=1ma iout=10ma iout=100ma iout=1a input voltage (v) efficiency (%) vout=5.0vl=2.2uh (xfl4020) cout=22uf g001
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 efficiency efficiency vs vs output current input voltage figure 11. efficiency with 2.5mhz, vout=3.3v figure 12. efficiency with 2.5mhz, vout=3.3v efficiency efficiency vs vs output current input voltage figure 13. efficiency with 1.25mhz, vout=1.8v figure 14. efficiency with 1.25mhz, vout=1.8v efficiency efficiency vs vs output current input voltage figure 15. efficiency with 1.25mhz, vout=0.9v figure 16. efficiency with 1.25mhz, vout=0.9v copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0.0001 0.001 0.01 0.1 1 10 vin=5v vin=12v vin=17v output current (a) efficiency (%) vout=0.9vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 iout=1ma iout=10ma iout=100ma iout=1a input voltage (v) efficiency (%) vout=0.9vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0.0001 0.001 0.01 0.1 1 10 vin=5v vin=12v vin=17v output current (a) efficiency (%) vout=1.8vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 iout=1ma iout=10ma iout=100ma iout=1a input voltage (v) efficiency (%) vout=1.8vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 0.0001 0.001 0.01 0.1 1 10 vin=5v vin=12v vin=17v output current (a) efficiency (%) vout=3.3vl=2.2uh (xfl4020) cout=22uf g001 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 4 5 6 7 8 9 10 11 12 13 14 15 16 17 iout=1ma iout=10ma iout=100ma iout=1a input voltage (v) efficiency (%) vout=3.3vl=2.2uh (xfl4020) cout=22uf g001
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com output voltage output voltage vs vs output current input voltage figure 17. output voltage accuracy (load regulation) figure 18. output voltage accuracy (line regulation) switching frequency switching frequency vs vs input voltage output current figure 19. switching frequency figure 20. switching frequency input current input current vs vs input voltage input voltage figure 21. quiescent current figure 22. shutdown current 10 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 2 2.5 3 output current (a) switching frequency (mhz) vin=12v, vout=3.3vl=2.2uh (xfl4020) fsw=low g000 3.20 3.25 3.30 3.35 3.40 0.0001 0.001 0.01 0.1 1 10 vin=5v vin=12v vin=17v output current (a) output voltage (v) vout=3.3vl=2.2uh (xfl4020) cout=22uf g001 3.20 3.25 3.30 3.35 3.40 4 7 10 13 16 iout=1ma iout=10ma iout=100ma iout=1a input voltage (v) output voltage (v) vout=3.3vl=2.2uh (xfl4020) cout=22uf g001 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 0.0 3.0 6.0 9.0 12.0 15.0 18.0 20.0 ?40c 25c 85c input voltage (v) input current (a) g001 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.0 3.0 6.0 9.0 12.0 15.0 18.0 20.0 ?40c 25c 85c input voltage (v) input current (a) g001 0 0.5 1 1.5 2 2.5 3 3.5 4 4 6 8 10 12 14 16 18 iout=0.5a iout=1a iout=2a iout=3a input voltage (v) switching frequency (mhz) vout=3.3vl=2.2uh (xfl4020) cout=22uf g000
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 static drain-source-resistance (r dson ) static drain-source-resistance (r dson ) vs vs input voltage input voltage figure 23. high-side switch resistance figure 24. low-side switch resistance output voltage output current vs vs output current input voltage figure 25. output voltage ripple figure 26. maximum output current power supply rejection ratio power supply rejection ratio vs vs frequency frequency figure 27. power supply rejection ratio, f sw =2.5mhz figure 28. power supply rejection ratio, f sw =2.5mhz copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 0 10 20 30 40 50 60 70 80 90 100 10 100 1k 10k 100k 1m vin=5v vin=12v vin=17v frequency (hz) psrr (db) vout=3.3v, iout=1al=2.2uh (xfl4020) cin=10uf, cout=22uf g000 0 10 20 30 40 50 60 70 80 90 100 10 100 1k 10k 100k 1m vin=5v vin=12v vin=17v frequency (hz) psrr (db) vout=3.3v, iout=0.1al=2.2uh (xfl4020) cin=10uf, cout=22uf g000 0 0.01 0.02 0.03 0.04 0.05 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 vin=5v vin=12v vin=17v output current (a) output voltage ripple (v) vout=3.3v,l=2.2uh (xfl4020) cout=22uf g000 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 4 5 6 7 8 9 10 11 12 13 14 15 16 17 ?40c 25c 85c input voltage (v) output current (a) vout=3.3vl=2.2uh (xfl4020) cout=22uf g000 0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 160.0 180.0 200.0 0.0 3.0 6.0 9.0 12.0 15.0 18.0 20.0 ?40c ?10c 25c 85c 125c input voltage (v) rdson high?side (m w ) g001 0.0 20.0 40.0 60.0 80.0 100.0 0.0 3.0 6.0 9.0 12.0 15.0 18.0 20.0 ?40c ?10c 25c 85c 125c input voltage (v) rdson low?side (m w ) g001
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com output voltage output voltage vs vs time time figure 29. pwm-psm-transition (v in =12v, v out =3.3v with figure 30. load transient response (i out = 0.5 to 3 to 0.5 a, 50mv/div) v in =12v, v out =3.3v) output voltage output voltage vs vs time time figure 31. load transient response of figure 30 , rising figure 32. load transient response of figure 30 , falling edge edge 12 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 output voltage output voltage vs vs time time figure 33. startup into 100ma (vin=12v, vout=3.3v) figure 34. startup into 3a (vin=12v, vout=3.3v) pwm signals power save mode signals vs vs time time figure 35. typical operation in pwm mode (i out =1a) figure 36. typical operation in power save mode (i out =10ma) copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com ambient temperature ambient temperature vs vs output current output power figure 37. maximum ambient temperature (f sw =2.5mhz) figure 38. maximum ambient temperature (f sw =2.5mhz) 14 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 55 65 75 85 95 105 115 125 0 0.5 1 1.5 2 2.5 3 3.5 output current (a) free?air temperature (c) TPS62130 evml=2.2uh (xfl4020) vin=12v, vout=3.3v g000 55 65 75 85 95 105 115 125 0 2 4 6 8 10 12 output power (w) free?air temperature (c) TPS62130 evml=2.2uh(xfl4020) vin=12v, vout=3.3v g000
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 detailed description device operation the tps6213x synchronous switched mode power converters are based on dcs-control ? ( d irect c ontrol with s eamless transition into power save mode), an advanced regulation topology, that combines the advantages of hysteretic, voltage mode and current mode control including an ac loop directly associated to the output voltage. this control loop takes information about output voltage changes and feeds it directly to a fast comparator stage. it sets the switching frequency, which is constant for steady state operating conditions, and provides immediate response to dynamic load changes. to get accurate dc load regulation, a voltage feedback loop is used. the internally compensated regulation network achieves fast and stable operation with small external components and low esr capacitors. the dcs-control tm topology supports pwm (pulse width modulation) mode for medium and heavy load conditions and a power save mode at light loads. during pwm, it operates at its nominal switching frequency in continuous conduction mode. this frequency is typically about 2.5mhz with a controlled frequency variation depending on the input voltage. if the load current decreases, the converter enters power save mode to sustain high efficiency down to very light loads. in power save mode the switching frequency decreases linearly with the load current. since dcs-control tm supports both operation modes within one single building block, the transition from pwm to power save mode is seamless without effects on the output voltage. fixed output voltage versions provide smallest solution size and lowest current consumption, requiring only 3 external components. an internal current limit supports nominal output currents of up to 3a. the tps6213x family offers both excellent dc voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with rf circuits. pulse width modulation (pwm) operation the tps6213x operates with pulse width modulation in continuous conduction mode (ccm) with a nominal switching frequency of 2.5 mhz or 1.25mhz, selectable with the fsw pin. the frequency variation in pwm is controlled and depends on v in , v out and the inductance. the device operates in pwm mode as long the output current is higher than half the inductor's ripple current. to maintain high efficiency at light loads, the device enters power save mode at the boundary to discontinuous conduction mode (dcm). this happens if the output current becomes smaller than half the inductor's ripple current. power save mode operation the tps6213x's built in power save mode will be entered seamlessly, if the load current decreases. this secures a high efficiency in light load operation. the device remains in power save mode as long as the inductor current is discontinuous. in power save mode the switching frequency decreases linearly with the load current maintaining high efficiency. the transition into and out of power save mode happens within the entire regulation scheme and is seamless in both directions. tps6213x includes a fixed on-time circuitry. this on-time, in steady-state operation, can be estimated as: (1) for very small output voltages, an absolute minimum on-time of about 80ns is kept to limit switching losses. the operating frequency is thereby reduced from its nominal value, which keeps efficiency high. using t on , the typical peak inductor current in power save mode can be approximated by: (2) when v in decreases to typically 15% above vout, the tps6213x won't enter power save mode, regardless of the load current. the device maintains output regulation in pwm mode. copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 15 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 on out in peak lpsm t l v v i - = ) ( ) ( ns v v t in out on 400 =
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com 100% duty-cycle operation the duty cycle of the buck converter is given by d=vout/vin and increases as the input voltage comes close to the output voltage. in this case, the device starts 100% duty cycle operation turning on the high-side switch 100% of the time. the high-side switch stays turned on as long as the output voltage is below the internal set point. this allows the conversion of small input to output voltage differences, e.g. for longest operation time of battery-powered applications. in 100% duty cycle mode, the low-side fet is switched off. the minimum input voltage to maintain output voltage regulation, depending on the load current and the output voltage level, can be calculated as: spacing (3) where i out is the output current, r ds(on) is the r ds(on) of the high-side fet and r l is the dc resistance of the inductor used. enable / shutdown (en) when enable (en) is set high, the device starts operation. shutdown is forced if en is pulled low with a shutdown current of typically 1.5 a. during shutdown, the internal power mosfets as well as the entire control circuitry are turned off. the internal resistive divider pulls down the output voltage smoothly. the en signal must be set externally to high or low. an internal pull-down resistor of about 400k is connected and keeps en logic low, if low is set initially and then the pin gets floating. it is disconnected if the pin is set high. connecting the en pin to an appropriate output signal of another power rail provides sequencing of multiple power rails. soft start / tracking (ss/tr) the internal soft start circuitry controls the output voltage slope during startup. this avoids excessive inrush current and ensures a controlled output voltage rise time. it also prevents unwanted voltage drops from high- impedance power sources or batteries. when en is set to start device operation, the device starts switching after a delay of about 50 s and vout rises with a slope controlled by an external capacitor connected to the ss/tr pin. see figure 33 and figure 34 for typical startup operation. connecting ss/tr directly to avin provides fastest startup behavior. the tps6213x can start into a pre-biased output. during monotonic pre-biased startup, both the power mosfets are not allowed to turn on until the device's internal ramp sets an output voltage above the pre-bias voltage. as long as the output is below about 0.5v a reduced current limit of typically 1.6a is set internally. if the device is set to shutdown (en=gnd), undervoltage lockout or thermal shutdown, an internal resistor pulls the ss/tr pin down to ensure a proper low level. returning from those states causes a new startup sequence as set by the ss/tr connection. a voltage supplied to ss/tr can be used for tracking a master voltage. the output voltage will follow this voltage in both directions up and down (see application information ). current limit and short circuit protection the tps6213x devices are protected against heavy load and short circuit events. if a short circuit is detected (vout drops below 0.5v), the current limit is reduced to 1.6a typically. if the output voltage rises above 0.5v, the device will run in normal operation again. at heavy loads, the current limit determines the maximum output current. if the current limit is reached, the high-side fet will be turned off. avoiding shoot through current, the low-side fet will be switched on to sink the inductor current. the high-side fet will turn on again, only if the current in the low-side fet has decreased below the low side current limit threshold. the output current of the device is limited by the current limit (see electrical characteristics ). due to internal propagation delay, the actual current can exceed the static current limit during that time. the dynamic current limit can be calculated as follows: 16 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 ( ) l )on(ds out (min) out (min) in r r i v v + + =
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 (4) where i limf is the static current limit, specified in the electrical characteristics , l is the inductor value, v l is the voltage across the inductor (v in - v out ) and t pd is the internal propagation delay. the current limit can exceed static values, especially if the input voltage is high and very small inductances are used. the dynamic high side switch peak current can be calculated as follows: (5) power good (pg) the tps6213x has a built in power good (pg) function to indicate whether the output voltage has reached its appropriate level or not. the pg signal can be used for startup sequencing of multiple rails. the pg pin is an open-drain output that requires a pull-up resistor (to any voltage below 7v). it can sink 2ma of current and maintain its specified logic low level. with TPS62130 it is high impedance when the device is turned off due to en, uvlo or thermal shutdown. TPS62130a features pg=low in this case and can be used to actively discharge vout (see figure 51 ). vin must remain present for the pg pin to stay low. pin-selectable output voltage (def) the output voltage of the tps6213x devices can be increased by 5% above the nominal voltage by setting the def pin to high (1) . when def is low, the device regulates to the nominal output voltage. increasing the nominal voltage allows adapting the power supply voltage to the variations of the application hardware. more detailed information on voltage margining using tps6213x can be found in slva489 . a pull down resistor of about 400kohm is internally connected to the pin, to ensure a proper logic level if the pin is high impedance or floating after initially set to low. the resistor is disconnected if the pin is set high. frequency selection (fsw) to get high power density with very small solution size, a high switching frequency allows the use of small external components for the output filter. however switching losses increase with the switching frequency. if efficiency is the key parameter, more than solution size, the switching frequency can be set to half (1.25 mhz typ.) by pulling fsw to high. it is mandatory to start with fsw=low to limit inrush current, which can be done by connecting to vout or pg. running with lower frequency a higher efficiency, but also a higher output voltage ripple, is achieved. pull fsw to low for high frequency operation (2.5 mhz typ.). to get low ripple and full output current at the lower switching frequency, it's recommended to use an inductor of at least 2.2uh. the switching frequency can be changed during operation, if needed. a pull down resistor of about 400kohm is internally connected to the pin, acting the same way as at the def pin (see above). under voltage lockout (uvlo) if the input voltage drops, the under voltage lockout prevents misoperation of the device by switching off both the power fets. the under voltage lockout threshold is set typically to 2.7v. the device is fully operational for voltages above the uvlo threshold and turns off if the input voltage trips the threshold. the converter starts operation again once the input voltage exceeds the threshold by a hysteresis of typically 200mv. thermal shutdown the junction temperature (tj) of the device is monitored by an internal temperature sensor. if tj exceeds 160 c (typ), the device goes into thermal shut down. both the high-side and low-side power fets are turned off and pg goes high impedance. when tj decreases below the hysteresis amount, the converter resumes normal operation, beginning with soft start. to avoid unstable conditions, a hysteresis of typically 20 c is implemented on the thermal shut down temperature. (1) maximum allowed voltage is 7v. therefore it ' s recommended to connect it to vout or pg, not vin. copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 17 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 ( ) ns l v v i i out in limf typ peak 30 )( - + = pd l limf typ peak t l v i i + = )(
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com application information the following information is intended to be a guideline through the individual power supply design process. programming the output voltage while the output voltage of the TPS62130 is adjustable, the tps62131/2/3 are programmed to fixed output voltages. for fixed output versions, the fb pin is pulled down internally and may be left floating. it is recommended to connect to agnd to improve thermal resistance. the adjustable version can be programmed for output voltages from 0.9v to 6v by using a resistive divider from vout to agnd. the voltage at the fb pin is regulated to 800mv. the value of the output voltage is set by the selection of the resistive divider from equation 6 (see figure 4 ). it is recommended to choose resistor values which allow a current of at least 2ua, meaning the value of r2 shouldn't exceed 400k . lower resistor values are recommended for highest accuracy and most robust design. for applications requiring lowest current consumption, the use of fixed output voltage versions is recommended. (6) in case the fb pin gets opened, the device clamps the output voltage at the vos pin internally to about 7.4v. external component selection the external components have to fulfill the needs of the application, but also the stability criteria of the devices control loop. the tps6213x is optimized to work within a range of external components. the lc output filters inductance and capacitance have to be considered together, creating a double pole, responsible for the corner frequency of the converter (see output filter and loop stability ). table 1 can be used to simplify the output filter component selection. table 1. recommended lc output filter combinations (1) 4.7 f 10 f 22 f 47 f 100 f 200 f 400 f 0.47 h 1 h 2.2 h (2) 3.3 h 4.7 h (1) the values in the table are nominal values. (2) this lc combination is the standard value and recommended for most applications. spacing the tps6213x can be run with an inductor as low as 1 h. fsw should be set low in this case. however, for applications running with the low frequency setting (fsw=high) or with low input voltages, 2.2 h is recommended. more detailed information on further lc combinations can be found in slva463 . inductor selection the inductor selection is affected by several effects like inductor ripple current, output ripple voltage, pwm-to- psm transition point and efficiency. in addition, the inductor selected has to be rated for appropriate saturation current and dc resistance (dcr). equation 7 and equation 8 calculate the maximum inductor current under static load conditions. spacing (7) 18 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 2 (max) (max) (max) l out l i i i d + = ? ? ? ? ? - = 1 2 1 ref out v v r r
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 (8) where i l (max) is the maximum inductor current, i l is the peak to peak inductor ripple current, l(min) is the minimum effective inductor value and f sw is the actual pwm switching frequency. spacing calculating the maximum inductor current using the actual operating conditions gives the minimum saturation current of the inductor needed. a margin of about 20% is recommended to add. a larger inductor value is also useful to get lower ripple current, but increases the transient response time and size as well. the following inductors have been used with the tps6213x and are recommended for use: table 2. list of inductors type inductance [ h] current [a] (1) dimensions [lxbxh] manufacturer mm xfl4020-102me_ 1.0 h, 20% 4.7 4 x 4 x 2.1 coilcraft xfl4020-152me_ 1.5 h, 20% 4.2 4 x 4 x 2.1 coilcraft xfl4020-222me_ 2.2 h, 20% 3.8 4 x 4 x 2.1 coilcraft ihlp1212bz-11 1.0 h, 20% 4.5 3 x 3.6 x 2 vishay ihlp1212bz-11 2.2 h, 20% 3.0 3 x 3.6 x 2 vishay srp4020-3r3m 3.3 h, 20% 3.3 4.8 x 4 x 2 bourns vlc5045t-3r3n 3.3 h, 30% 4.0 5 x 5 x 4.5 tdk (1) lower of i rms at 40 c rise or i sat at 30% drop. spacing the inductor value also determines the load current at which power save mode is entered: (9) using equation 8 , this current level can be adjusted by changing the inductor value. capacitor selection output capacitor the recommended value for the output capacitor is 22uf. the architecture of the tps6213x allows the use of tiny ceramic output capacitors with low equivalent series resistance (esr). these capacitors provide low output voltage ripple and are recommended. to keep its low resistance up to high frequencies and to get narrow capacitance variation with temperature, it's recommended to use x7r or x5r dielectric. using a higher value can have some advantages like smaller voltage ripple and a tighter dc output accuracy in power save mode (see slva463 ). note: in power save mode, the output voltage ripple depends on the output capacitance, its esr and the peak inductor current. using ceramic capacitors provides small esr and low ripple. copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 19 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 l psm load i i d = 2 1 ) ( ? ? ? ? ? ? ? ? - = d sw in out out l f l v v v i (min) (max) (max) 1
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com input capacitor for most applications, 10 f will be sufficient and is recommended, though a larger value reduces input current ripple further. the input capacitor buffers the input voltage for transient events and also decouples the converter from the supply. a low esr multilayer ceramic capacitor is recommended for best filtering and should be placed between pvin and pgnd as close as possible to those pins. even though avin and pvin must be supplied from the same input source, it's required to place a capacitance of 0.1uf from avin to agnd, to avoid potential noise coupling. an rc, low-pass filter from pvin to avin may be used but is not required. soft start capacitor a capacitance connected between ss/tr pin and agnd allows a user programmable start-up slope of the output voltage. a constant current source supports 2.5 a to charge the external capacitance. the capacitor required for a given soft-start ramp time for the output voltage is given by: (10) where c ss is the capacitance (f) required at the ss/tr pin and t ss is the desired soft-start ramp time (s). spacing note dc bias effect: high capacitance ceramic capacitors have a dc bias effect, which will have a strong influence on the final effective capacitance. therefore the right capacitor value has to be chosen carefully. package size and voltage rating in combination with dielectric material are responsible for differences between the rated capacitor value and the effective capacitance. spacing tracking function if a tracking function is desired, the ss/tr pin can be used for this purpose by connecting it to an external tracking voltage. the output voltage tracks that voltage. if the tracking voltage is between 50mv and 1.2v, the fb pin will track the ss/tr pin voltage as described in equation 11 and shown in figure 39 . spacing (11) figure 39. voltage tracking relationship 20 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 vfb [v] vss/tr [v] 0.2 0.4 0.6 0.8 0.4 1.2 0.8 tr ss fb v v / 64.0 ? [ ] f v a t c ss ss 25 1 52 . . m =
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 once the ss/tr pin voltage reaches about 1.2v, the internal voltage is clamped to the internal feedback voltage and device goes to normal regulation. this works for rising and falling tracking voltages with the same behavior, as long as the input voltage is inside the recommended operating conditions. for decreasing ss/tr pin voltage, the device doesn't sink current from the output. so, the resulting decrease of the output voltage may be slower than the ss/tr pin voltage if the load is light. when driving the ss/tr pin with an external voltage, do not exceed the voltage rating of the ss/tr pin which is v in +0.3v. if the input voltage drops into undervoltage lockout or even down to zero, the output voltage will go to zero, independent of the tracking voltage. figure 40 shows how to connect devices to get ratiometric and simultaneous sequencing by using the tracking function. spacing figure 40. sequence for ratiometric and simultaneous startup spacing the resistive divider of r1 and r2 can be used to change the ramp rate of vout2 faster, slower or the same as vout1. a sequential startup is achieved by connecting the pg pin of vout1 to the en pin of vout2. ratiometric start up sequence happens if both supplies are sharing the same soft start capacitor. equation 10 calculates the soft start time, though the ss/tr current has to be doubled. details about these and other tracking and sequencing circuits are found in slva470 . note: if the voltage at the fb pin is below its typical value of 0.8v, the output voltage accuracy may have a wider tolerance than specified. output filter and loop stability the devices of the tps6213x family are internally compensated to be stable with l-c filter combinations corresponding to a corner frequency to be calculated with equation 12 : (12) proven nominal values for inductance and ceramic capacitance are given in table 1 and are recommended for use. different values may work, but care has to be taken on the loop stability which will be affected. more information including a detailed lc stability matrix can be found in slva463 . copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 21 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 c l f lc = p 2 1 TPS62130 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd TPS62130 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd r1 r2 vout1 vout2
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com the tps6213x devices, both fixed and adjustable versions, include an internal 25pf feedforward capacitor, connected between the vos and fb pins. this capacitor impacts the frequency behavior and sets a pole and zero in the control loop with the resistors of the feedback divider, per equation equation 13 and equation 14 : spacing (13) spacing (14) spacing though the tps6213x devices are stable without the pole and zero being in a particular location, adjusting their location to the specific needs of the application can provide better performance in power save mode and/or improved transient response. an external feedforward capacitor can also be added. a more detailed discussion on the optimization for stability vs. transient response can be found in slva289 and slva466 . layout considerations a proper layout is critical for the operation of a switched mode power supply, even more at high switching frequencies. therefore the pcb layout of the tps6213x demands careful attention to ensure operation and to get the performance specified. a poor layout can lead to issues like poor regulation (both line and load), stability and accuracy weaknesses, increased emi radiation and noise sensitivity. see figure 41 for the recommended layout of the tps6213x, which is designed for common external ground connections. therefore both agnd and pgnd pins are directly connected to the exposed thermal pad. on the pcb, the direct common ground connection of agnd and pgnd to the exposed thermal pad and the system ground (ground plane) is mandatory. also connect the vos pin in the shortest way to vout at the output capacitor. provide low inductive and resistive paths for loops with high di/dt. therefore paths conducting the switched load current should be as short and wide as possible. provide low capacitive paths (with respect to all other nodes) for wires with high dv/dt. therefore the input and output capacitance should be placed as close as possible to the ic pins and parallel wiring over long distances as well as narrow traces should be avoided. loops which conduct an alternating current should outline an area as small as possible, as this area is proportional to the energy radiated. sensitive nodes like fb and vos need to be connected with short wires and not nearby high dv/dt signals (e.g. sw). as they carry information about the output voltage, they should be connected as close as possible to the actual output voltage (at the output capacitor). the capacitor on the ss/tr pin and on avin as well as the fb resistors, r1 and r2, should be kept close to the ic and connect directly to those pins and the system ground plane. the exposed thermal pad must be soldered to the circuit board for mechanical reliability and to achieve appropriate power dissipation. the recommended layout is implemented on the evm and shown in its users guide, slvu437 . additionally, the evm gerber data are available for download here, slvc394 . 22 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 ? ? ? ? ? + = 2 1 1 1 25 2 1 r r pf f pole p pf r f zero 25 2 1 1 = p
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 figure 41. layout example thermal information implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power- dissipation limits of a given component. three basic approaches for enhancing thermal performance are listed below: ? improving the power dissipation capability of the pcb design ? improving the thermal coupling of the component to the pcb by soldering the exposed thermal pad ? introducing airflow in the system for more details on how to use the thermal parameters, see the application notes: thermal characteristics application note ( szza017 ), and ( spra953 ). the tps6213x is designed for a maximum operating junction temperature (t j ) of 125 c. therefore the maximum output power is limited by the power losses that can be dissipated over the actual thermal resistance, given by the package and the surrounding pcb structures. if the thermal resistance of the package is given, the size of the surrounding copper area and a proper thermal connection of the ic can reduce the thermal resistance. to get an improved thermal behavior, it's recommended to use top layer metal to connect the device with wide and thick metal lines. internal ground layers can connect to vias directly under the ic for improved thermal performance. if short circuit or overload conditions are present, the device is protected by limiting internal power dissipation. experimental data, taken from the TPS62130 evm, shows the maximum ambient temperature (without additional cooling like airflow or heat sink), that can be allowed to limit the junction temperature to at most 125 c (see figure 37 ). copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 23 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 1 2 3 4 16 15 14 13 12 11 10 9 7 6 5 l1 cin r1 r2 cout vout gnd gnd avin 8 en pg to agnd pvin to gnd plane c c
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com application example as power led supply spacing the TPS62130 can be used as a power supply for power leds. the fb pin can be easily set down to lower values than nominal by using the ss/tr pin. with that, the voltage drop on the sense resistor is low to avoid excessive power loss. since this pin provides 2.5 a, the feedback pin voltage can be adjusted by an external resistor per equation 15 . this drop, proportional to the led current, is used to regulate the output voltage (anode voltage) to a proper level to drive the led. both analog and pwm dimming are supported with the TPS62130. figure 42 shows an application circuit, tested with analog dimming: spacing figure 42. single power led supply spacing the resistor at ss/tr sets the fb voltage to a level of about 300mv and is calculated from equation 15 . spacing (15) spacing the device now supplies a constant current, set by the resistor at the fb pin, by regulating the output voltage accordingly. the minimum input voltage has to be rated according the forward voltage needed by the led used. more information is available in the application note slva451 . spacing typical applications spacing spacing figure 43. 5v/3a power supply spacing spacing 24 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 22uf 5v / 3a 1 / 2.2 h tps62133 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 10uf (5 .. 17)v 3.3nf 0.1uf tr ss fb r a v / . . = m 52 64 0 22uf 4.7uf 2.2h (4 .. 17) v 0.1r 187k adim pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd TPS62130
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 spacing spacing spacing spacing spacing figure 44. 3.3v/3a power supply spacing spacing spacing figure 45. 2.5v/3a power supply spacing spacing spacing figure 46. 1.8v/3a power supply spacing spacing spacing copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 25 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 22uf 1.8v / 3a 10uf 1 / 2.2 h (3 .. 17)v 3.3nf tps62131 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 0.1uf 22uf 2.5v / 3a 10uf (3 .. 17)v 3.3nf TPS62130 390k 180k pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 0.1uf 1 / 2.2 h 22uf 3.3v / 3a tps62132 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 1 / 2.2 h 10uf (3.3 .. 17)v 3.3nf 0.1uf
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com spacing spacing spacing spacing spacing figure 47. 1.5v/3a power supply spacing spacing spacing figure 48. 1.2v/3a power supply spacing spacing spacing figure 49. 1v/3a power supply spacing spacing 26 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 22uf 1.5v / 3a TPS62130 130k 150k pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 1 / 2.2 h 10uf (3 .. 17)v 3.3nf 0.1uf 22uf 1v / 3a TPS62130 51k 200k pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 1 / 2.2 h 10uf (3 .. 17)v 3.3nf 0.1uf 22uf 1.2v / 3a TPS62130 75k 150k pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 100k 1 / 2.2 h 10uf (3 .. 17)v 3.3nf 0.1uf
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 www.ti.com slvsag7b ? november 2011 ? revised june 2013 application example as inverting power supply spacing the TPS62130 can be used as inverting power supply by rearranging external circuitry as shown in figure 50 . as the former gnd node now represents a voltage level below system ground, the voltage difference between v in and v out has to be limited for operation to the maximum supply voltage of 17v (see equation 16 ). spacing (16) spacing figure 50. ? 3.3v inverting power supply spacing the transfer function of the inverting power supply configuration differs from the buck mode transfer function, incorporating a right half plane zero additionally. the loop stability has to be adapted and an output capacitance of at least 22 f is recommended. a detailed design example is given in slva469 . spacing active output discharge spacing the TPS62130a pulls the pg pin low, when the device is shut down by en, uvlo or thermal shutdown. connecting pg to vout through a resistor can be used to discharge vout in those cases (see figure 51 ). the discharge rate can be adjusted by r3, which is also used to pull up the pg pin in normal operation. for reliability, keep the maximum current into the pg pin less than 10ma. spacing figure 51. discharge vout through pg pin copyright ? 2011 ? 2013, texas instruments incorporated submit documentation feedback 27 product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133 22uf vout / 3a 10uf 1 / 2.2 h (3 .. 17)v 3.3nf pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd r3 r1 r2 TPS62130a TPS62130 pvin avin en ss/tr def fsw sw vos pg fb agnd pgnd 2.2h (3 .. 13.7)v 10uf 383k 1.21m 22uf -3.3v 10uf 3.3nf max in out in v v v +
TPS62130, TPS62130a tps62131 , tps62132 , tps62133 slvsag7b ? november 2011 ? revised june 2013 www.ti.com revision history note: page numbers of current version may differ from previous versions. changes from revision a (september 2012) to revision b page ? added device TPS62130a to data sheet header ................................................................................................................. 1 ? added device TPS62130a to ordering information table. .................................................................................................... 2 ? added text to power good section regarding tps63130a. ............................................................................................... 17 ? added pin option to footnote statement for pin-selectable output voltage (def) section. .............................................. 17 ? added text to frequency selection (fsw) section regarding pin control. .......................................................................... 17 ? added text to tracking function section for clarification. ................................................................................................... 21 ? added application example regarding TPS62130a device. ............................................................................................... 27 28 submit documentation feedback copyright ? 2011 ? 2013, texas instruments incorporated product folder links: TPS62130, TPS62130a tps62131 tps62132 tps62133
package option addendum www.ti.com 27-jul-2013 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) op temp (c) device marking (4/5) samples TPS62130argtr active qfn rgt 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year pa6i TPS62130argtt active qfn rgt 16 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year pa6i TPS62130rgtr active qfn rgt 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 ptsi TPS62130rgtt active qfn rgt 16 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 ptsi tps62131rgtr active qfn rgt 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 qvx tps62131rgtt active qfn rgt 16 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 qvx tps62132rgtr active qfn rgt 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 qvy tps62132rgtt active qfn rgt 16 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 qvy tps62133rgtr active qfn rgt 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 qvz tps62133rgtt active qfn rgt 16 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 qvz (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material)
package option addendum www.ti.com 27-jul-2013 addendum-page 2 (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant TPS62130argtr qfn rgt 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 TPS62130argtt qfn rgt 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 TPS62130rgtr qfn rgt 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 TPS62130rgtt qfn rgt 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 tps62131rgtr qfn rgt 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 tps62131rgtt qfn rgt 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 tps62132rgtr qfn rgt 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 tps62132rgtt qfn rgt 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 tps62133rgtr qfn rgt 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 tps62133rgtt qfn rgt 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 q2 package materials information www.ti.com 27-jul-2013 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) TPS62130argtr qfn rgt 16 3000 552.0 367.0 36.0 TPS62130argtt qfn rgt 16 250 552.0 185.0 36.0 TPS62130rgtr qfn rgt 16 3000 552.0 367.0 36.0 TPS62130rgtt qfn rgt 16 250 552.0 185.0 36.0 tps62131rgtr qfn rgt 16 3000 552.0 367.0 36.0 tps62131rgtt qfn rgt 16 250 552.0 185.0 36.0 tps62132rgtr qfn rgt 16 3000 552.0 367.0 36.0 tps62132rgtt qfn rgt 16 250 552.0 185.0 36.0 tps62133rgtr qfn rgt 16 3000 552.0 367.0 36.0 tps62133rgtt qfn rgt 16 250 552.0 185.0 36.0 package materials information www.ti.com 27-jul-2013 pack materials-page 2

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